OPC - One Page CPU
Welcome to the OPC series of CPUs, where everything fits on one page!
Implementations:-
- OPC-1 - a minimal accumulator based OPC to fit a XC9572 CPLD
- OPC-2 - a load/store based OPC to fit a XC9572 CPLD
- OPC-3 - a direct translation of OPC-1 using 16bit datapath and address bus.
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OPC-4 - this spot reserved for a reworking of OPC-3 without any hardware restrictions
- OPC-5 - a 16 bit OPC with 16 registers, as a 2 operand machine with 16b data and address busses and minimal instruction set
- OPC-5-LS - a load-store version of OPC-5, which gains 6 useful instructions by discarding an addressing mode.
- OPC-6 - an extended version of OPC-5 adding more instructions but retaining the overall architecture of OPC-5LS.
- OPC-7 - a 32 bit wide, simplified version of OPC-6, with all instructions a single word, and with 20 bit addressing.
- OPC-8 - a first attempt to explore a 24 bit wide machine using the familiar OPC6/7 pipeline and general arrangement